Signal Integrity Analysis on Integrated Thin Film High Density Organic Package Technology for Next Generation Applications
(Room Ballroom H)
17 Oct 18
4:25 PM
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4:55 PM
The next-generation platforms running high-end computing systems, such as gaming, video processing and Internet of things (IoT), require higher bandwidth, lower power, and a smaller form factor. A novel integrated thin film high-density organic package technology (i-THOP) for application processor and memory (HBM) system is developed for next generation high performance applications. Memory-intensive high-end applications, requiring high-speed data transmission between the processor and large capacity memory units, poses challenges in terms of trace width and length. HBM achieves higher bandwidth while using less power in a substantially smaller form factor. i-THOP technology, which is a new packaging technology providing localized high-density interconnects between two or more die on an organic package substrate, is a solution for these high-end computing systems that need high memory bandwidth between the CPU and DRAM. For application processor and memory system, the i-THOP technology can provide better system performance and lower package profile, compared to current package on package (PoP) technology. In addition, the high data rate and low supply voltage in the high-end computing systems introduce the design challenges of signal integrity (SI) and power integrity (PI). For good SI performance, the system packages must perform with low transmission loss and short signal path to achieve the required electrical specifications. The i-THOP technology provides excellent timing matching, increased signal speed due to shorter interconnects with a smaller form factor, and reduced RLC parasitic and power requirements. This paper investigates the SI application of a fine-line, fine-pitch, large-size i-THOP technology for integrating ASIC and HBM. It starts by examining the package electrical modeling methodology used in GHz I/O device modeling in more robust and accurate way to support high volume manufacturing and SI design. This is followed by the evaluation of package models across frequency and timing analysis to find out the optimized design to SI performance. The contribution of each package attribute to the I/O performance is investigated using S-parameter and eye diagram technique. S-parameter technique is used for frequency analysis while eye diagram is used for timing analysis. Finally, SI performances of i-THOP is compared over PoP technology being used traditionally.