EDI CON USA 2018

Min Huang
Design Engineer
Xilinx


Min Huang received her Master in 2013 in electrical engineering from University of California, Los Angeles. Min joined Xilinx Inc. since 2015 in transceiver architecture and modeling team under SerDes Technology Group. Prior to that, she was working on SerDes architecture at LSI. Her current interest is high speed IO architecture modeling and system level simulations.

Sessions :