EDI CON USA 2018
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Steve
Krooswyk
Steve Krooswyk
Connector SI Design Engineer
Samtec Inc
Steve contributes to new high-speed connector development at Samtec. His 15 years of signal integrity experience has had a focus on the design, simulation, and correlation of PCIe interconnect and I/O. Steve has held the PCIe tech lead position for SI in Intel’s data center division, is an author of the book High Speed Digital Design: Design of High Speed Interconnects and Signaling, and holds a MS degree from the University of South Carolina.
Sessions :
Evaluating Connector Crosstalk Impact on System Crosstalk at 32Gbps (PCIE Gen5)
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