SEMICON Korea 2018

Metrology and Inspection Forum (Room #402, COEX)

As device technology shrinks to sub-10 nm, we expect a lot of challenges in process integration. Thus, many chip makers are considering EUV lithography to mitigate process risk and to reduce process integration time. However, EUV lithography also has many technical challenges. On the other hand, 3D memory process also brings another technical issue in many aspects. Therefore, we believe the role of Metrology & Inspection is getting more and more important to enable sub-10nm and 3D device. This year, celebrating its 10th anniversary, MI Forum will cover the theme as “MI: An Enabler of Future Devices” with technical experts from worldwide. We hope you can get better understanding on MI challenges and solutions for upcoming process technologies in the forum and build the network with industry leaders in MI Networking reception, which will be held after the forum as well.

To see session agenda, please click here