Linear Voltage Regulator Model (VRM) for Power Integrity Simulations
(Room Ballroom H)
18 Oct 18
1:20 PM
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1:50 PM
Tracks:
High Speed Digital Symposium
A linear VRM is needed to enable Power Integrity (PI) simulations at frequencies beyond the VRM bandwidth. A power integrity engineer is often interested in the properties of the board power planes and vias, the package balls, vias, power planes and package caps, and the die bumps, on-die power grid and on-die capacitance for the silicon load. These power integrity components are important in the 1 MHz to 500 MHz frequency band. PI simulations are performed in both the frequency and time domains. A simple-to-use VRM model is required that does not consume much computer resource. An ideal voltage source is usually the power source for time domain PI simulations, Vdd=1V. The problem with the ideal voltage source is that it is zero impedance and shorts out (ac) any PI component it is across, i.e. a VRM bulk capacitor. We want to simulate the properties of the bulk caps as they supply higher frequency current to the silicon load. We dare not short out the bulk caps with an ideal voltage source. The solution is a VRM model with a few simple linear components. The linear VRM model does not begin to address the non-linear, stability, noise ripple and saturation properties of a real VRM. This requires a highly complex time domain model that involves much computer resource and often hours of run time. Complex VRM models necessary in VRM design but are not necessary for PI simulations that are beyond the bandwidth of the VRM. All VRM output impedances rise beyond the VRM bandwidth and are well represented by an inductor. The inductance value is calculated either by current ramp-time considerations or by matching the resonant frequency between the VRM inductance and bulk (output) capacitance. When a bulk capacitor is added to the VRM inductance, an impedance peak is raised up. The peak frequency is 1/(2xpixsqrt(LC)). If the bulk capacitance and peak frequency are known, the equivalent VRM inductance is easily calculated. The height of the impedance peak is determined by the system losses, including the bulk cap. There is a temptation to choose R for a 2 element series RL model to properly damp the impedance peak. But this leads to excessive resistance in the path from the ideal voltage source and much DC IR drop. A solution is to use a 4 element linear VRM model with an additinal resistor and inductor. The second resistor is used to independently damp the impedance peak while the first resistor is used to set the proper DC IR drop. We do not want the VRM to deliver significant current at high frequency, so a second inductor with a value of approximately L_VRM/10 is used to block high frequency current. The 4 element linear VRM model matches all the properties of the 2 element model but has the additional advantage of correct DC IR drop at high currents where the 2 element model does not. This is important when the power integrity simulation calls for simulation of large step currents.