Demystifying Edge Launch Connectors
(Room Ballroom H)
17 Oct 18
3:45 PM
-
4:15 PM
High performance radio-frequency (RF) connectors are utilized in a range of applications from RF/test measurement boards to semi-conductor evaluation. Even though most RF connectors exhibit performance way beyond that of a typical printed circuit board (PCB), the channel performance is dependent on their interaction with the PCB. A particularly challenging configuration is the edge launch, where these connectors are used on the edge of the PCB with a transition to a microstrip trace. A poorly optimized connector footprint leads to degradation of the signal integrity performance, especially at high data rates. This paper will first identify the root cause of the problem by showing how the electromagnetic fields behave at the transition area. We will then demonstrate how to address these challenges by matching the size of the connector signal pin to the size of the top dielectric layer in the board. Finally, we will address the ground discontinuities that can be reduced with PCB modifications such as edge plating and castellated vias. We will present both simulated data, by utilizing a full wave 3D field solver software, and measured data from our own connectors and boards. Through simulation and implementation of these design constraints we will exhibit the key dependencies between design variables and identify the steps necessary to ensure the quality of high speed transmission for edge launch connectors. These results will exemplify the direct relationship between overall channel performance and the interaction of the interconnect and board.