EDI CON USA 2018

Causality in Power Delivery Network (PDN) Extractions in Package & Board (Room 203)

17 Oct 18
3:45 PM - 4:15 PM

Tracks: Power Integrity

With power aware IO buffer models like IBIS 5.0 used very commonly in design, extraction (S parameters) of package & board signals with power is becoming a challenge. Signal traces are well controlled standard impedance designs while Power delivery network (PDN) is specific to a design. Power integrity checks will ensure PDN offers low impedance to IC drawing current to ensure ripple voltage is under control. Signal integrity checks will ensure that signals are not having any sort of discontinuities. When power aware simulations are performed, signal and power are together extracted (S parameters). Extracting signals without causality is well know in literature. But extracting power being causal with signal also being causal is difficult task as signal & power by its nature are way too different. Non-causal PDN will cause incorrect supply ripple voltage & incorrect signal swings (due to power riding on signal) during transient simulations. This makes SI engineer to over design PDN which has cost impact to product as well as design cycle gets extended. This paper talks about causality of PDN in Touchstone 2.0 file. How can first time extraction of PDN can be made causal. What is impact on design (timing failures, excessive supply ripple) if causality check is not done on PDN of package or board.