EDI CON USA 2018

Via Characterization and Modeling By Z Input Impedance (Room Ballroom H)

17 Oct 18
2:25 PM - 2:55 PM

Tracks: Signal Integrity

Vias are now present in nearly every high-speed digital channel, and are a crucial part of the channel performance. These channels are routed signal traces on a printed circuit board (PCB) composed of transmission lines and vias, and are the path of signal propagation. Due to the higher data rate requirements, the signal’s wavelength becomes shorter and shorter; therefore, the effect of vias in the design is very noticeable. For example, increased impedance mismatch, higher loss due to the via stub resonances, and potential electro-magnetic interference issues occur. Design engineers have traditionally used TDR (Time Domain Reflectometry) as a tool to characterize and optimize via designs, yet the TDR approach comes with its shortcomings, for instance, demanding shorter rise-time step signal or larger bandwidth S-parameters, and inaccurate read-out on the via impedance. In order to characterize vias in much faster speed systems, we need to have a more efficient and practical way that remedy the shortcomings of the traditional TDR method. In this paper, we propose a simple and effective Z input impedance method that augments the traditional TDR method for characterizing and optimizing via designs in much faster speed systems.The Z input impedance method is a frequency-domain measurement that records via impedance vs. frequency, instead of the time-domain impedance vs distance measurement that a TDR plot would show. Signal waveforms can be decomposed into a series of Fourier spectral components, and a propagating waveform will experience different impedance values at each of these spectral components. The Z input impedance method will provide the exact impedance value that a propagating waveform will see at each of these spectral components. The Z input impedance method also has no requirement for short risetime step signals or extremely-high-bandwidth S-parameters in order to characterize small via structures. Instead, only measured or simulated S-parameters up to the highest spectral component of interest are needed. Additionally, the parasitics induced by vias, via stubs, non-functional via pads, and functional via pads can be easily related to the frequency dependent Z input impedance profile. This relationship makes it easy for designers to understand, characterize, and optimize the interconnect performance.