Abstract:
Probe cards are the “last mile” between the silicon wafer and automated test equipment (ATE), and must accommodate the variety of spatial, mechanical, and electrical constraints imposed by both the on-wafer die and the ATE test head. On the wafer side, recent advances in packaging capability such as copper pillars and 2.5D/3D, paired with the industry’s need for the higher throughputs of multi-site test, have catapulted probe card technology onto a Moore’s Law like trajectory with functional density doubling every two years. This exponential trajectory has been enabled by significant investments in specially-developed probe-card manufacturing technologies, such as micro-composite MEMS structures and automated assembly robots. These technologies are a far cry from the tweezer-assembled tungsten wires of yesteryear, and provide significant overall cost reduction by enabling higher multi-site counts, improved yields, and die-size reductions. On the tester side, the interface changes are much less dynamic than those on the wafer side, however, significant resources and costs are expended in each probe card design for such mundane elements as connectors, mechanical stiffeners, and printed circuit boards. Some of these costs have been reduced with standard configurations and reusability of major subcomponents, and that trend will continue. As with Moore’s Law in the front end, the investments made to realize these advances have resulted in substantial economic benefits for the industry, and there is more to be done to enable this trajectory to continue into the future.