SEMICON West 2016

Managing Higher Test Costs- Michel Villemain, Presto Engineering (Room North Hall, Room 131)

12 Jul 16
11:20 AM - 11:35 AM

Tracks: Test Forum

Abstract:

Test costs historically increased with tester costs (higher pin count, higher speed, more features) then went down as tester cost went down (increased hardware integration) and multi-site parallelism went up. New devices driven by IoT applications are now driving more comprehensive test flows, either from heterogeneous contents or, more specifically, from higher security and personalization requirements. At the same time, IoT chips are under extreme cost pressure in high-mix, high-volume manufacturing.

We will discuss the drivers for extended test flows, methods for implementing them and models that highlight opportunities for cost efficiencies in both test development and production test.