Abstract:
In the data center, performance of data intensive applications (analytics, AI, pattern matching, genomics...) are heavily limited by memory bandwidth between the main memory (DRAM) and the host CPU, much more than processing efficiency: this is the “Memory wall”.
With the end of Moore’s law, and no planned evolution on memory bus for large capacity memory systems, heterogeneous solutions are investigated.
UPMEM is building a data-centric processing solution for the datacenter, to drastically accelerate memory-bounded algorithms. UPMEM solution consists of integrating processors into the DRAM chips, so that we put together in a single server 2 048 co-processors, on 128GB of DRAM. Memory bandwidth is 80x larger than the one typically seen by an x86 processor.
UPMEM-designed chips integrate DRAM Processing Units (DPUs) and DRAM, packaged on a standard DDR4/DIMM module to offer the most-efficient acceleration solution. UPMEM solution does not modify the server hardware architecture.
UPMEM is the programmable scalable efficient PIM solution to solve the Memory wall.
UPMEM designed a RISC processor that both delivers strong performance and manufacturability on DRAM processes. UPEM solution is both agnostic to the server processor (x86, Power, Sparc…) and OS (Linux, Windows…).
UPMEM is endlessly scalable with one efficient processor every 64MB of working memory, at the mere cost of expanding DRAM chips by about 20% and adapting the applications performance-critical code.
Benchmarks show a 20 times and more acceleration with several algorithms limited by the server processor-DRAM memory bandwidth: graph analysis, genomics, In-Memory DataBase management…