Abstract:
Automotive and industrial applications are continuously raising the bar in terms of high current capability expectations from semiconductor devices functioning in today’s world. Compliance to these specifications is posing a great challenge for test engineers in terms of having to produce high quality production test solutions for these devices. Even though high current sustainability requirements are continuously increasing, the industry has simultaneously been following a different route by pushing for higher and higher pin-count System-On-A-Chip devices intended for mixed signal and high speed applications. This diverse path has often given a tendency for automated test equipment supply companies to opt for instrumentation that either focuses on supporting multi-channel instrumentation or on supporting high current Source and/or Sink capabilities. If high current ATE support is followed, testing instruments nowadays tend to provide either high current or high voltage flexibility, but rarely do they support high power. This restricts the available possibilities to choose from when developing robust test solutions. Stacking of instrumentation and channel merging seems to have become the norm to be able to comply with either higher voltage supply or higher current supply, respectively.
Automated Test Equipment intended for high performance digital and SoIC devices, like the UltraFlex Test System or the J750, generally suffers from these high power limitations for most of its allocated testing instrumentation. In order to sustain high current levels greater than 4 Amps, hybrid test methodologies, using both tester internal capabilities and external hardware expansions, need to be involved. These practices can be charted at the expense of reducing the number of available channels, where multi-site parallelism is typically impacted as well. Out of the available ATE instrumentation, the 4-quadrant analog VI instruments seem to be generally chosen when needing to comply with these high current specifications due to its typical high number of channels available.
Using the Ultra Flex test system as an example, our team at Texas Instruments has developed a test technique to Force and/or Sink more than 4 Amps by making use of an external network topology that gangs multiple DCVI channels. Even though the maximum capability per DCVI channel is typically between 1 and 2 Amps, a software merge at the tester side is generally permitted by merging 2 channels to extend the current capability up to 4 Amps. Greater current levels than these can only be attained by doing a hardware gang of 2 pairs of 2-software-merged-channels by using the special network topology to be discussed in this presentation. When recurring to this method, precautions need to be taken to restrict the high current flow to only one direction, which should at all times be flowing from the slave-pair to the master-pair. This routine also needs to make sure that voltage is kept at a very low level by balancing the VI curve appropriately to avoid exceeding instrumentation power spec’d requirements.
This paper intends to explore in detail all hardware and software implications and considerations that need to be taken into account when developing application testing solutions that make use of this high current source and sink technique. Besides providing guidance on how to implement this methodology, various examples and an application case study for the UltraFlex test system will be discussed.