Abstract:
As the industry moves quickly toward more and more 2.5D and 3D integration there is a significant increase in new and different thermal test requirements in order to permit at-speed Known-Good-Dies and Known-Good-Stacks testing. More silicon devices per assembly and more transistors per die is pushing the limit of existing thermal control systems. This situation is further complicated before assembly or as a partially assembled product progress through the assembly process. Doing high and low-temperature testing (including final-test test content) can have a significant value to reducing product costs and increasing product quality.
This paper discusses a die-level-test system which provides a new capability to the industry. This paper shares the real world experiences using this die-level probing solution to handle both thick and thin devices. The paper will present results of high-power tests and share the resulting thermal model. Additionally, results are shown for single touchdown multiple temperature probing.