Abstract:
Time-to-market is a primary concern of chipmakers at advanced technology nodes, as the likelihood of capturing significant return on investment is greatly increased for those players with early wins. While there has been significant discussion of the impact of the design cycle on time-to-market, dialogue concerning the impact of silicon prototyping and New Product Introduction (NPI) on time-to-market is less available and will be discuss herein. An important Key performance indicator (KPI) related to time-to-market is the duration of time from GDS-in to first-silicon sort. This duration has four components: mask data prep, mask write, fab mask qualification, and prototype execution. Obviously, mask-count impacts the timing of all four sectors. Mask-count has grown by up to 40% moving from 14nm patterning to 10nm SADP patterning without EUV lithography. The increased mask count will bring with it significant additional delay to the overall NPI process. The delays associated with the increased mask count can only be contained with significant optimization to data preparation and mask write efficiency. Additionally, fab mask qualification and prototype setup execution are both impacted by the NPI business process which must be continually improved in order to meet customer expectations of first-time-prototype-success (FTPS) while minimizing the impact on time-to-market. Some related solutions and continuous improvements will be subsequently discussed.