Abstract:
For five decades the semiconductor industry has been following a technology and cost progression known as "Moore's Law". Today there are unprecedented challenges facing the industry in continuing to advance technology in a cost effective manner. In this presentation we will look at the progression of technology and cost to-date and prospects for future advanced nodes.
We will begin by reviewing the technology and cost evolution for logic products with projections for the future. We will discuss the technology evolution and process complexity trends and we will compare scaling for the leading logic companies and look at cost drivers. We will present cost trends by node for capital equipment and we will break out wafer costs by front-end-of-line versus back-end-of-line, patterning and non-patterning costs and equipment, people and materials.
We will also examine memory trends discussing scaling issues for DRAM, the 2D to 3D transition for NAND and the new 3D XPoint memory. Technical issues, scaling trends and costs for the technologies will all be discussed.