Abstract:
Sustaining Moore’s Law over the next decade will require not only continued scaling of the physical dimensions of transistors but also performance improvement and aggressive reduction in power consumption. Several device options beyond FinFETs such as GAA nanowire FETs are being pursued to extend technology scaling to 5nm node and beyond. Hetero-junction Tunnel FET (HTFET) have emerged as promising transistor candidates for supply voltage scaling down to sub-0.5V due to the possibility of sub-kT/q switching without compromising on-current (ION). Recently n-type III-V HTFET with reasonable on-current and sub-kT/q switching at supply voltage of 0.5V have been experimentally demonstrated. However, steep switching performance of III-V HTFET till date has been limited to range of drain current (IDS) spanning over less than a decade. In this talk, we will review progress in Tunnel FETs and also analyze primary roadblocks in the path towards achieving steep switching performance in low power, steep slope Heterojunction Tunnel FETs.