(Co-hosted by CPMT Society of IEEE)
A significant challenge to heterogeneous integration is processor-to-memory integration, whether designing for CPU, GPU or for signal processor application. Package solutions for mobile applications, FC BGA and FC PoP, are being augmented by 2.5D, Fan Out PoP and Fan Out SiP designs, as well as by evolving process technologies (TSV & TSV-less, chip first & chip last). Applications range across AP processors in smart phones, gateways, servers and networks, and data analytics-capable computers. We have invited a panel of experts from across the ecosystem to outline their vision, discuss the challenges, and introduce the innovative technologies being designed specifically to deliver advantageous solutions.
